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SUMMARY:The Belle II Pixel Detector Data Aquisition and Background Suppres
 sion System
DTSTART;VALUE=DATE-TIME:20170303T043000Z
DTEND;VALUE=DATE-TIME:20170303T045000Z
DTSTAMP;VALUE=DATE-TIME:20260421T044319Z
UID:indico-contribution-1705@indico.inp.nsk.su
DESCRIPTION:Speakers: Klemens Lautenbach (JLU Giessen)\nThe Belle II exper
 iment\, at the future SuperKEKB collider in Tsukuba\, Japan\, features a d
 esign luminosity of $8\\cdot 10^{35}$ cm$^{-2}$s$^{-1}$\, which is a facto
 r of 40 larger than its predecessor KEKB. The pixel detector (PXD) with ab
 out 8 million pixels is based on the DEPFET technology and will improve th
 e vertex resolution in beam direction by a factor of 2. With an estimated 
 trigger rate of $30$ kHz\, the PXD is expected to generate a data rate of 
  20 GBytes/s\, which is about 10 times larger than the amount of data gene
 rated by all other Belle II subdetectors.\n\nDue to the large beam-related
  background\, the PXD needs a data acquisition system with high-bandwidth 
 data links and realtime background reduction by a factor of 10 as otherwis
 e the event builder will be saturated. To achieve this\, the Belle II pixe
 l DAQ uses an FPGA-based computing platform with high speed serial links i
 mplemented in the ATCA (Advanced Telecommunications Computing Architecture
 ) standard.\n\nThe architecture and performance of the data acquisition sy
 stem and data reduction of the PXD will be presented.\n\nIn April 2016 a p
 rototype PXD-DAQ system\, which was operated in a test beam campaign\, del
 ivered first data with the whole readout chain under realistic\, high rate
  conditions. Final results from the test beam will be presented.\n\nhttps:
 //indico.inp.nsk.su/event/8/contributions/1705/
LOCATION:
URL:https://indico.inp.nsk.su/event/8/contributions/1705/
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