Dr Polyneikis Tzanis (National Technical University of Athens)
The LHC accelerator plans to have a series of upgrades to increase its instantaneous luminosity to7.5×1034cm−2s−1.The luminosity increase drastically impacts the ATLAS trigger and readout data rates.The present ATLAS small wheel muon detector will be replaced with a New Small Wheel (NSW) detectorwhich is expected to be installed in the ATLAS Undergroundcavern at the end of2020. With the series-production micromegas (MM)quadruplets (modules) already produced the activities concerning the integration of the modules into the final, fully equipped MM wedges, that will then be installed on the wheel structure on surface, are currently in full swingat CERN. One crucial part of the integration procedure concerns the installation, testing and validation of the on-detector electronics &readout chain for a very large system with a more than 2.1 M electronic channels in total. These include ~4K MM Front-End Boards (MMFE8), custom printed circuit boards each one housing eight 64-channel VMM Application Specific Integrated Circuits (ASICs) that interface with the ATLAS Trigger and Data Acquisition (TDAQ) system through ~1K data-driver Cards (ADDC& L1DDC, respectively). The readout chain is based on optical link technology (GigaBit Transceiver links) connecting the backend to the front-end electronics via the Front-End LInk eXchange (FELIX), is a newly developed system that will serve as the nextgeneration read out driver for ATLAS. Experience and performance results from the first large-scale electronics integration tests performed at CERN on final MM wedges, including system validation with cosmic-rays, will be presented.