# Instrumentation for Colliding Beam Physics (INSTR-17)

27 February 2017 to 3 March 2017
Budker Institute of Nuclear Physics
Asia/Novosibirsk timezone

## Silicon Technologies for the CLIC Vertex Detector

28 Feb 2017, 14:40
20m
Contributed Oral Tracking and vertex detectors

### Speaker

Dr Simon Spannagel (CERN)

### Description

CLIC is a proposed linear e$^+$e$^-$ collider providing particle collisions at center-of-mass energies of up to 3 TeV. The physics objectives of precise top quark, Higgs boson and Beyond Standard Model physics require a superior performance of the CLIC detector. In particular the vertex detector faces the challenges of providing a single point resolution of only a few micrometers while not exceeding the envisaged material budget of around 0.2% X$_0$ per layer. Beam-beam interactions and beamstrahlung processes impose an additional requirement on the timestamping capabilities of the vertex detector of about 10 ns. These goals can only be met by employing novel techniques in the sensor and ASIC design as well as in the detector construction. The mass of the overall detector is reduced by using forced air-flow cooling. To enable this, the detector will be operated in a power pulsing scheme, limiting the power dissipation to the minimum and making use of the beam structure of the CLIC accelerator. The R&D program for the CLIC vertex detector comprises various technologies which are explored in order to meet the above demands. The feasibility of planar sensors with a thickness of 50-150$\mu$m, including different active edge designs, are evaluated using Timepix3 ASICs. First prototypes of the CLICpix readout ASIC, implemented in 65 nm CMOS technology and with a pixel pitch of $25\times 25 \mu m^2$, have been produced and tested in particle beams. An updated version of the ASIC with larger pixel matrix and improved precision of the time-over-threshold and time-of-arrival measurements has been submitted. Different hybridization concepts have been developed for the interconnection between the sensor and readout ASIC, ranging from small-pitch bump bonding of planar sensors to capacitive coupling of active HV-CMOS sensors. Furthermore, a through-silicon via (TSV) interconnect process has been developed, allowing for seamless tiling of detectors in large areas. Detector simulations based on Geant4 and TCAD allow the comparison with experimental results and are used to assess and optimize the performance of the various designs. This contribution gives an overview of the R&D program undertaken for the CLIC vertex detector and presents performance measurements of the prototype detectors currently under investigation.

 Slides