27 February 2017 to 3 March 2017
Budker Institute of Nuclear Physics
Asia/Novosibirsk timezone

Monitoring complex detectors: the uSOP approach in Belle II experiment

3 Mar 2017, 11:10
20m
Contributed Oral Electronics, Trigger and Data Acquisition Electronics, Trigger and Data Acquisition

Speaker

Dr Francesco Di Capua (Università di Napoli "Federico II")

Description

uSOP is a general purpose single board computer designed for deep embedded applications in control and monitoring of detectors, sensors, and complex laboratory equipment. In this work we present and discuss the main aspects of the hardware and software design and the expandable peripheral architecture built around field busses. We show the tests done with state-of-art DS 24-bit ADC acquisition modules, in order to assess the achievable noise floor in a typical application. We report on the deployment of uSOP in the monitoring system framework of the ECL endcap calorimeter of the Belle2 experiment, presently under construction at the KEK Laboratory (Tsukuba, J).

Summary

uSOP is a Service-Oriented Platform designed for deep embedded applications in controls and monitoring of detectors, sensors as well as complex research instruments. It is a single board computer (Fig.1) with a Eurocard 3U form factor. It is based on the AM3358 (1 GHz ARM Cortex A8 processor), equipped with standard microSD flash memory card reader, USB and Ethernet interfaces. On-board RAM and solid state storage allows hosting a full LINUX distribution including GNU compilers, tools, libraries, a window system, as well as documentation and software frameworks for specific user tasks. The board supports SPI, I2C, JTAG and UART interfaces, all of them galvanically isolated and each equipped with a separate supply to power remote sensors and
acquisition resources like ADCs, DACs, digital I/O expander, optocouplers. Non-isolated digital I/Os allow the user to benefit from the Programmable Real time Units (PRU) available in the processor and from the sophisticated event capture and timer peripherals.
Aiming at embedded applications, uSOP has been designed to offer resilient, low maintenance performance in harsh, limited access environment. The most critical system-level operations can be performed remotely by means of a specific LAN connection operated independently by the main processor. Such an approach allows the user to reset and power cycle the board, to flash the operating system on the storage unit and/or boot from the network, to redirect the system console on the LAN in order to troubleshoot hardware and software issues.

Primary author

Dr Francesco Di Capua (Università di Napoli "Federico II")

Co-authors

Prof. Alberto Aloisio (Università di Napoli "Federico II") Mr Antonio Anastasio (INFN Sez. Napoli) Dr Fabrizio Ameli (INFN Sez. Roma 1) Mr Gennaro Tortone (INFN Sez. Napoli) Prof. Paolo Branchini (INFN Sez. Roma 3) Dr Raffaele Giordano (Università di Napoli "Federico II") Dr Vincenco Izzo (INFN Sez. Napoli)

Presentation Materials